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Scholarly Interest Report
         
Yehia Massoud
Associate Professor
Associate Professor of Electrical and Computer Engineering
 
e-mail:massoud@rice.edu
 
  • Ph.D. Electrical Engineering and Computer Science (1999) MIT, Cambridge, MA
  • M.S. Electronics and Communication Engineering (1994) Cairo University, Egypt
  • B.S. Electronics and Communication Engineering (1991) Cairo University, Egypt
 
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Department Affiliations
 
  • Department of Computer Science
  • Ken Kennedy Institute for Information Technology
  • Rice Quantum Institute
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    Websites
     Rice Automated Nanoscale Design group
     Yehia Massoud
     
    Research Areas
     High performance digital and mixed-signal integrated circuits; System-On-Chip design; Electromagnetics applications in Nano- and Bio- technology
     
    Research
     My research interests are in the modeling, analysis, and design automation of high frequency analog, mixed-signal, and digital integrated circuits, and Micro-Electro-Mechanical Systems (MEMS). I also interested in Electromagnetics applications in Nano- and Bio- technology
     
    Research
     My research interests are in the modeling, analysis, and design automation of high frequency analog, mixed-signal, and digital integrated circuits, and Micro-Electro-Mechanical Systems (MEMS). I am particularly interested in System-On-Chip design as it combines all of these areas and offers a very rich multi-disciplinary arena of research that has a huge array of applications and a large impact.
     
    Teaching Areas
     VLSI Systems, Circuits and Systems
     
    Selected Publications
     Refereed articles
     

    Yehia Massoud and Jacob White "Managing On-Chip Inductive Effects." Proceedings of the IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 10 (Dec. 2002) : 789-798.

     
     

    Yehia Massoud and Jacob White "Simulation and Modeling of the Effect of Substrate Conductivity on Coupling Inductance and Circuit Crosstalk ." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 10 (June 2002) : 286-291.

     
     

    Yehia Massoud and Yehea Ismail "The Impact of On-Chip Inductance in High Speed ICs." IEEE Circuits and Devices Magazine, 17 (July 2001) : 14-21.

     
     Refereed conference papers
     

    Matt Kamon, Nano Marques, Yehia Massoud, Luis Silveria and Jacob White "Interconnect Analysis: From 3-D Structures to Circuit Models." Proceedings of the IEEE/ACM Design Automation Conference, DAC. (June 1999) : 910-914.

     
     

    Mohab Anis and Yehia Massoud "Power Challenges in Deep SubMicron Technologies." Proceedings of the 46th IEEE Midwest Symposium on Circuits and Systems (Dec. 2003)

     
     

    Qing Su, Yehia Massoud, Jamil Kawa, and Charles Chiang "Accurate Modeling of Substrate Coupling Without Grounded Backplates." Proceedings of the IEEE International System-On-Chip Conference (Sept. 2003)

     
     

    SoYoung Kim, Yehia Massoud, and Simon Wang "On the Accuracy of Return Path Assumption for Loop Inductance Extraction for 0.1um Technology and Beyond." Proceedings of the IEEE/ACM International Symposium on Quality Electronic Design, ISQED. (March 2003) : 401-404.

     
     

    Yehia Massoud "How Does the Substrate Conductivity Affect the On-Chip Coupling Inductance Behavior." Proceedings of the MIT Workshop on Computing Technology (Sept. 1996)

     
     

    Yehia Massoud "MCMAD: A Narrow-Band Microwave Amplifier Design Program." Proceedings of the MIT Workshop on Computing Technology (Sept. 1996)

     
     

    Yehia Massoud and Jacob White "Fast Inductance Extraction of 3-D Structures with Non-constant Permeabilities." Proceedings of the Modeling and simulation of Microsystems, Semiconductors, Sensors and Actuators. (April 1998) : 190-193.

     
     

    Yehia Massoud and Jacob White "FastMag: a 3-D Fast Inductance Extraction Program for Structures with Permeable materials." Proceedings of the IEEE/ACM International Conference on Computer Aided Design, ICCAD. (Nov. 2002) : 478-484.

     
     

    Yehia Massoud and Jacob White "Improving the Generality of the Fictitious Magnetic Charge Approach to Computing Inductances in the Presence of Permeable Materials." Proceedings of the IEEE/ACM Design Automation Conference, DAC. (June 2002) : 552-555.

     
     

    Yehia Massoud and Jacob White "Simulation and Modeling of the Effect of Substrate Conductivity on Coupling Inductance." Proceedings of the IEEE International Electron Devices Meeting, IEDM. (Dec. 1995) : 491-494.

     
     

    Yehia Massoud and Jacob White "Simulation of the Coupling Inductance Effect on Circuit Cross-talk." Proceedings of the Techcon Conference (Sept. 1996)

     
     

    Yehia Massoud and Mohab Anis "Scaling Challenges in CMOS Digital Circuits." Proceedings of the IEEE International Symposium on Circuits and Systems, ISCAS (May 2004)

     
     

    Yehia Massoud, Jamil Kawa, Don MacMillen and Jacob White "Differential Signaling in Cross-Talk Avoidance Strategies for Physical Synthesis." Proceedings of the ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems. (Dec. 2000) : 64-69.

     
     

    Yehia Massoud, Jamil Kawa, Don MacMillen and Jacob White "Modeling and Analysis of Differential Signaling for Minimizing Inductive Cross-Talk." Proceedings of the IEEE/ACM Design Automation Conference, DAC. (June 2001) : 804-809.

     
     

    Yehia Massoud, Junfeng Wang and Jacob White "Accurate Inductance Extraction with Permeable Materials Using Qualocation." Proceedings of the International Conference on Modeling and Simulation of Microsystems. (April 1999) : 151-154.

     
     

    Yehia Massoud, Steve Majors, Tareq Bustami and Jacob White "Layout Techniques for Minimizing On-Chip Interconnect Self Inductance." Proceedings of the IEEE/ACM Design Automation Conference, DAC. (June 1998) : 566-571.

     
     Other
     

    Yehia Massoud "Computer Aided Design of Low-Noise and Broad-Band Microwave Transistor Amplifiers."  (June 1994)

     
     

    Yehia Massoud "Simulation Algorithms for Inductive Effects."  (Sept. 1999)

     
    Presentations
     Invited Papers
     

    "Power Challenges in Deep SubMicron Technologies,." IEEE Midwest Symposium on Circuits and Systems, Cairo, Eg. (December 30, 2003) With M. Anis

     
     Invited Talks
     

    "Challenges for System-on-a-Chip Integration,." IEEE International Workshop on System-on-Chip for Real-Time Applications, Calgary, Alberta, Canada. (June 30, 2003)

     
     

    "DSM Design and Process Roadmap - an EDA Perspective,." Synopsys Engineering Conference, San Diego, CA. (February 15, 2000)

     
     

    "On-Chip Inductance and Coupling Effects,." Fabless Semiconductor Association (FSA) Design Modeling Workshop, Santa Clara, CA. (October 11, 2000)

     
     Lectures
     

    "The Deep Sub-Micron Challenge in High Speed Integrated Circuits,." ECE Affiliates Meeting, Rice University, Houston, TX. (October 8, 2003)

     
     Other
     

    "Accurate Inductance Extraction with Permeable Materials Using Qualocation." Proceedings of the International Conference on Modeling and Simulation of Microsystems, San Juan, Puerto Rico. (April 1999) With J., Wang and J. White

     
     

    "Differential Signaling in Cross-Talk Avoidance Strategies for Physical Synthesis." ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Austin, TX. (December 2000) With J. Kawa, D. MacMillen and J. White

     
     

    "Fast Inductance Extraction of 3-D Structures with Non-constant Permeabilities." Modeling and simulation of Microsystems, Semiconductors, Sensors and Actuators, Santa Clara, CA. (April 1998) With J. White

     
     

    "FastMag: a 3-D Fast Inductance Extraction Program for Structures with Permeable materials." IEEE/ACM International Conference on Computer Aided Design, ICCAD, San Jose, CA. (November 2002) With J. White

     
     

    "Improving the Generality of the Fictitious Magnetic Charge Approach to Computing Inductances in the Presence of Permeable Materials." Proceedings of the IEEE/ACM Design Automation Conference, DAC., New Orleans, LA. (June 2002) With J. White

     
     

    "Layout Techniques for Minimizing On-Chip Interconnect Self Inductance." IEEE/ACM Design Automation Conference, DAC., San Francisco, CA. (June 1998) With S. Majors, T. Bustami and J.White

     
     

    "Modeling and Analysis of Differential Signaling for Minimizing Inductive Cross-Talk." Proceedings of the IEEE/ACM Design Automation Conference, DAC., Las Vegas, NV. (June 2001) With J. Kawa, D, MacMillen and J. White

     
     

    "Scaling Challenges in CMOS Digital Circuits." IEEE International Symposium on Circuits and Systems, Vancouver, Canada. (May 2004) With M. Anis

     
     

    "Simulation and Modeling of the Effect of Substrate Conductivity on Coupling Inductance." IEEE International Electron Devices Meeting, IEDM., Washington D.C.. (December 1995) With J. White

     
     

    "Simulation of the Coupling Inductance Effect on Circuit Cross-talk." The SRC Techcon Conference, Phoenix, AZ. (September 1996) With J. White

     
    Supervised Theses & Dissertations
     Anshuman Dasqupta, Doctor of Philosophy Tailoring Traditional Optimizaitons for Runtime Compilation. (2006) (Thesis Committee Member)

    Awards, Prizes, & Fellowships
     Member of Organizing Committee, PhD. Forum at the IEEE/ACM Design Automation Conference (2001-2003)

     Distinction with Honors Award, Cairo University (1991)

     Minister of Education Award in Mathematics, Ministry of Education, Egypt (1986)

     Synopsys Special Recognition Award, Synopsys (2000)

     Member of Program Committee, IEEE International Workshop on System-on-Chip for Real Time Applications (2003)

     Outstanding Academic Record Award, Cairo University (1987-1991)

    Positions Held
     Member of Technical Staff, Advanced Technology Group, Synopsys Inc.. (2004 - 2004)

     Member of Technical Staff, Advanced Technology Group, Synopsys Inc.. (2003 - 2003)