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Scholarly Interest Report
         
Scott Rixner
Professor
Professor of Computer Science and Electrical and Computer Engineering
 
e-mail:rixner@rice.edu
 
  • S.B. (1995) Massachusetts Institute of Technology
  • Ph.D. (2000) Massachusetts Institute of Technology
  • M.Eng. (1995) Massachusetts Institute of Technology
 
Primary Department
   Department of Computer Science
Picture
 
Department Affiliations
 
  • Center for Multimedia Communication
  • Department of Electrical and Computer Engineering
  • Ken Kennedy Institute for Information Technology
  •  
    Websites
     Rice Computer Architecture Group
     
    Research Areas
     Computer architecture, Operating systems
     
    Using the Network Interface for TCP Acceleration
     TCP offload is a technique to improve TCP/IP networking performance of a network computer system by moving (parts of) TCP processing from the host processor to the network interface. There are several ways to achieve offload. The typical full offload moves all TCP functionalities to the network interface, and TCP processing is performed exclusively on the network interface. However, when the network interface has limited processing power, full offload creates a bottleneck at the network interface and degrades system performance. In contrast, TCP offload based on connection handoff allows the operating system to move a subset of connections to the network interface. This way, both the host processor and the network interface perform TCP processing, and the operating system can control the amount of work performed on the host processor and the network interface. Thus, by using connection handoff, the system can fully utilize the processing power of the network interface without creating a bottleneck in the system. The goal of this project is to create a more effective framework for using the network interface (or other coprocessor) to accelerate TCP processing. By using connection handoff, the operating system can maintain control of the network subsystem, while still utilizing the processing and storage capabilities of the network interface to improve networking performance. Similarly, network interface data caching can improve overall performance by storing frequently transmitted data directly on the network interface.
     
    Reconfigurable and Programmable Gigabit Ethernet NICs
     Networking has become an integral part of modern computer systems. While the network interface has traditionally been a simple device that forwards raw data between the network and the operating system, its role is changing. The wide variety of services that are migrating to the network interface clearly motivates the need for directed research into the most effective services and abstractions that can be implemented by the network interface. However, existing programmable network interfaces do not provide enough computational power or memory capacity to implement these services efficiently. We are developing a reconfigurable and programmable Gigabit Ethernet NIC using an FPGA to surpass the performance limitations of these existing NICs. This will enable exploration of processor architectures for network interfaces, as well as the implementation of these new services on an actual network interface. This new network interface will be made freely available for use in research and education.
     
    Network Subsystem Design for Scalable Internet Servers
     As technology trends push future microprocessors toward chip multiprocessor designs, operating system network stacks must be parallelized in order to keep pace with improvements in network bandwidth. The most efficient network stacks in modern operating systems are single-threaded, forcing the network stack to only run on a single processor core at a time. However, for network-intensive applications, parallelism within the operating system is all but required in order to exploit the parallel nature of modern and future hardware to saturate ever increasing network bandwidths. The goal of this project is to explore the range of network stack parallelization strategies on modern parallel architectures and to improve upon the best organizations by redefining the hardware/software interface between the network interface and the operating system appropriately.
     
    I/O Virtualization for Virtual Machine Monitors
     Virtual machine monitors (VMMs) allow multiple virtual machines running on the same physical machine to share hardware resources such as a disk, video display, or network interface card (NIC). To provide network support, for example, a VMM must present each virtual machine with a software interface that is multiplexed onto the actual physical NIC. While sharing the physical device, the VMM must prevent one virtual machine from altering data in another virtual machine through the hardware device, either maliciously or through programmer error. Additionally, the VMM should at minimum provide each virtual machine an approximately equal opportunity to use the physical interface. The overhead incurred by a purely software-based virtualization approach can significantly degrade performance. The goal of this project is to develop efficient I/O virtualization architectures that use both hardware and software techniques to minimize the overhead of multiplexing, data protection, and flexible resource scheduling.
     
    Embedded Systems Architecture
     In spite of the increasing capacity of embedded memories on current and future SoCs, application, cost, and time-to-market requirements will continue to necessitate the use of external commodity memories in many embedded systems. These commodity memories and their associated interconnect can dissipate as much or more power than the SoC. The passive nature of these commodity memories motivates the development of novel solutions to manage power and energy within the memory controller on the SoC. This project aims to reduce the power and energy consumption of the memory system in order to address the requirements of future low power and high performance embedded systems.

    Furthermore, existing architectural simulators are not well-suited to embedded systems designs. First, embedded systems with programmable processors also incorporate nonprogrammable units such as direct memory access (DMA) and medium access control (MAC) units that asynchronously interact with the host I/O interconnect, external networks, and local memory. Second, most embedded systems are I/O intensive, and the workload consists not only of the firmware to implement those tasks, but also the I/O interactions with the external world. This project aims to produce a flexible simulation infrastructure that allows accurate simulation of such embedded systems
     
    High-performance MPI using TCP/IP
     MPI applications, like other parallel applications, perform two distinct functions computation and communication. The computation aspect is mostly performed by the application directly, whereas the MPI library provides the communication support to the application. Thus, the overall performance of a MPI application, depends as much on individual nodes' computation power, as on the communication substrate used and the library support available for communication over that substrate. As the computation power of individual nodes has increased with faster processors over the past several years, the focus of attention for improving MPI performance on workstation clusters has gradually shifted towards the communication medium and the MPI library. TCP/IP over Ethernet has significant advantages as a messaging substrate in MPI: TCP is ubiquitous, highly portable and extremely robust. Furthermore, Ethernet-based solutions are relatively inexpensive compared to existing specialized solutions. This project aims to overcome the drawbacks of TCP/IP over Ethernet compared to specialized networks as a messaging substrate for MPI applications.
     
    Selected Publications
     Refereed articles
     

    Myeongjae Jeon, Conglong Li, Alan L. Cox, and Scott Rixner. Reducing DRAM row activations with eager read/write clustering. ACM Transactions on Architecture and Code Optimization, Accepted for publication, 2014.

     
     

    Derek Schuff, Vijay S. Pai, Paul Willmann, and Scott Rixner "Parallel programmable Ethernet controllers: performance and security." IEEE Network, 21(4) (July/August 2007)

     
     

    Jeffrey Shafer and Scott Rixner "RiceNIC: A Reconfigurable network interface for experimental research and education." Proceedings of the Workshop on Experimental Computer Science (June 2007)

     
     

    Jeffrey Shafer and Scott Rixner "RiceNIC: Prototyping network interfaces." Proceedings of the Workshop on Architectural Research Prototyping (June 2007)

     
     

    Hyong-youb Kim, Scott Rixner, and Vijay S. Pai "Network Interface Data Caching." IEEE Transactions on Computers, 54:11 (2005) : 1394-1408.

     
     

    Sridhar Rajagopal, Joseph R. Cavallaro, and Scott Rixner "Design Space Exploration for Real-time Embedded Stream Processors." IEEE Micro, 24:4 (2004) : 54-66.

     
     

    Ujval J. Kapasi, Scott Rixner, William J. Dally, Brucek Khailany, Jung Ho Ahn, Peter Mattson, and John D. Owens "Programmable Stream Processors." Computer, 36:8 (2003) : 54-62.

     
     

    Brucek Khailany, William J. Dally, Ujval J. Kapasi, Peter Maattson, Jinyung Namkoong, John D. Owens, Brian Towles, Andrew Chang, and Scott Rixner "Imagine: Media Processing with Streams ." IEEE Micro, 21:2 (2001) : 35-46.

     
     Articles
     

    Kaushik Kumar Ram, Alan Cox, and Scott Rixner. Hyper-switch: A scalable software virtual switching architecture. ;login: the USENIX Magazine, 38(5), October 2013

     
     

    Thomas W. Barr and Scott Rixner. The Owl embedded Python environment: Microcontroller development for the modern world. ;login: the USENIX Magazine, 38(1), February 2013

     
     Books
     

    Scott Rixner "Stream Processor Architecture."  (2001)

     
     Refereed conference papers
     

    Brent Stephens, Alan L. Cox, and Scott Rixner. Scalable multi-failure fast failover via forwarding table compression "Scalable multi-failure fast failover via forwarding table compression." Proceedings of the Symposium on SDN Research (March 2016) Submitted

     
     

    Myeongjae Jeon, Yuxiong He, Hwanju Kim, Sameh Elnikety, Scott Rixner, and Alan L. Cox "TPC: Target-driven parallelism combining prediction and correction to reduce tail latency in interactive services.." Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) (April 2016) Submitted

     
     

    Rebecca Smith and Scott Rixner "Leveraging managed runtime systems to build, analyze, and optimize memory graphs." Proceedings of the International Conference on Virtual Execution Environments (VEE) (April 2016) Submitted

     
     

    Rebecca Smith and Scott Rixner "Surviving peripheral failures in embedded systems." Proceedings of the USENIX Annual Technical Conference (July 2015) Submitted

     
     

    Yanxin Lu, JoeWarren, Chris Jermaine, Swarat Chaudhuri, and Scott Rixner "Grading the graders: Motivating peer graders in a MOOC." Proceedings of the InternationalWorld Wide Web Conference (May 2015) Submitted

     
     

    Anna Drummond, Yanxin Lu, Swarat Chaudhuri, Christopher Jermaine, Scott Rixner, and Joe Warren. " Learning to grade student programs in a massive open online course. In Proceedings of the IEEE International Conference on Data Mining, Shenzhen, China, December 2014.." 

     
     

    Joe Warren, Scott Rixner, John Greiner, and Stephen Wong. "Facilitating human interaction in an online programming course. In Proceedings of the ACM Technical Symposium on Computer Science Education (SIGCSE), Atlanta, GA, March 2014.." In Progress

     
     

    Lei Tang, Joe Warren, and Scott Rixner. " An environment for learning interactive programming. In Proceedings of the ACM Technical Symposium Computer Science Education (SIGCSE),Atlanta, GA, March 2014.." 

     
     

    Myeongjae Jeon, Saehoon Kim, Seung-Won Hwang, Yuxiong He, Sameh Elnikety, Alan Cox, and Scott Rixner "Predictive parallelization: Taming tail latencies in web search. In Proceedings of the ACM SIGIR Conference, Gold Coast, Australia, July 2014.." 

     
     

    Thomas W. Barr and Scott Rixner. "Medusa: Managing concurrency and communication in embedded systems. In Proceedings of the USENIX Annual Technical Conference, Philadelphia, PA, June 2014.." 

     
     

    Brent Stephens, Alan L. Cox, and Scott Rixner. Plinko: Building provably resilient forwarding
    tables. In Proceedings of the ACM Workshop on Hot Topics in Networks (HotNets), College Park,
    MD, November 2013.

     
     

    Kaushik Kumar Ram, Alan L. Cox, Mehul Chadha, and Scott Rixner. Hyper-switch: A scalable software virtual switching architecture. In Proceedings of the USENIX Annual Technical Conference, San Jose, CA, June 2013.

     
     

    Myeongjae Jeon, Yuxiong He, Sameh Elnikety, Alan L. Cox, and Scott Rixner. Adaptive parallelism for web search. In Proceedings of the EuroSys Conference, Prague, Czech Republic, April 2013.

     
     

    Thomas W. Barr, Rebecca Smith, and Scott Rixner. Design and implementation of an embedded Python run-time system.  In Proceedings of the USENIX Annual Technical Conference, Boston, MA, June 2012.

     
     

    Brent Stephens, Alan L. Cox, Scott Rixner, and T.S. Eugene Ng. A scalability study of network enterprise architectures. In Proceedings of the Symposium on Architectures for Networking and Communications Systems (ANCS), Brooklyn, NY, October 2011.

     
     

    Thomas Barr, Alan L. Cox, and Scott Rixner. SpecTLB: A mechanism for speculative address translation. In Proceedings of the International Symposium on Computer Architecture (ISCA), San Jose, CA, June 2011.

     
     

    In Proceedings of International Symposium on Distributed Autonomous Robotics Systems (DARS)Lausanne, Switzerland

     
     

    In Proceedings of the Symposium on Architectures for Net-working and Communications Systems (ANCS), La Jolla, CA, October 2010

     
     

    In Proceeding of the International Symposium on performance Analysis  of Systems and Software (ISPASS), White Plains, NY, March 2010

     
     

    In proceedings of the Symposium on Architectures for Networking and Communications Systems (ANCS), La Jolla, CA, October 2010

     
     

    In proceeding of the Internatinal Symposium on Computer Architecture (ISCA), Saint Malo, France, June 2010.

     
     

    D. Ongaro, A.L. Cox, S. Rixner "Scheduling I/O in virtual machine monitors." Proceedings of the International Conference on Virtual Execution Environments (VEE) (March 2008)

     
     

    K. K. Ram, J.R. Santos, Y. Turner, A.L. Cox, S. Rixner "Achieving 10Gbps using safe and transparent network interface virtualization." Proceedings of the International Conference on Virtual Execution Environments (VEE) (March 2009)

     
     

    K.K. Ram, I. Fedeli, A.L. Cox, S. Rixner "Explaining the impact of network transport protocols on SIP proxy performance." Proceedings of the International Symposium on Performance Analysis of Systems and Software (April 2008)

     
     

    P. Willmann, S. Rixner, A.L. Cox "Protection strategies for direct access to virtualized I/O devices." Proceedings of the USENIX Annual Technical Conference (June 2008)

     
     

    Mihir Choudhury, Kyle Ringgenberg, Scott Rixner, and Kartik Mohanram "Single-ended coding techniques for off-chip interconnects to commodity memory." Proceedings of the Design Automation and Test in Europe Conference (April 2007)

     
     

    Paul Willmann, Jeffrey Shafer, David Carr, Aravind Menon, Scott Rixner, Alan L. Cox, and Willy Zwaenepoel "Concurrent direct network access for virtual machine monitors." Proceedings of the International Symposium on High-Performance Computer Arcitecture (HPCA) (February 2007)

     
     

    Hyong-youb Kim and Scott Rixner "Connection Handoff Policies for TCP Offload Network Interfaces." Proceedings of the Symposium on Operating Systems Design and Implementation (OSDI) (2006)

     
     

    Hyong-youb Kim and Scott Rixner "TCP Offload Through Connection Handoff." Proceedings of the EuroSys Conference (2006) : 279-290.

     
     

    Mihir Choudhury, Kyle Ringgenberg, Scott Rixner, and Kartik Mohanram "Single-ended Coding Techniques for Off-chip Interconnects to Commodity Memory." Prodeedings of the Design Automation and Test in Europe Conference (2007) In Press

     
     

    Paul Willmann, Jeffrey Shafer, David Carr, Aravind Menon, Scott Rixner, Alan L. Cox, and Willy Zwaenepoel "Concurrent Direct Network Access for Virtual Machine Monitors." Proceedings of the International Symposium on High-Performance Computer Architecture (2007) In Press

     
     

    Paul Willmann, Scott Rixner, and Alan L. Cox "An Evaluation of Network Stack Parallelization Strategies in Modern Operating Systems." Proceedings of the USENIX Annual Technical Conference (2006) : 91-96.

     
     

    Paul Willmann, Hyong-youb Kim, Vijay S. Pai, and Scott Rixner "An Efficient Programmable 10 Gigabit Ethernet Network Interface Card." Proceedings of the International Symposium on High-Performance Computer Architecture (HPCA) (2005) : 96-107.

     
     

    Hyong-youb Kim and Scott Rixner "Performance Characterization of the FreeBSD Network Stack." ISPASS (2005) Submitted

     
     

    Scott Rixner "Memory Controller Optimizations for Web Servers." Proceedings fo the International Symposium on Microarchitecture (MICRO) (2004)

     
     

    Scott Rixner, Kartik Mohanram, and Amitabh Menon "Memory Controller Design for Off-chip Interconnect Power Reduction." DAC (2005) Submitted

     
     

    Supratik Majumder, Vijay S. Pai, and Scott Rixner "An Event-driven Architecture for MPI Libraries." Proceedings of the Los Alamos Computer Science Institute Symposium (2004)

     
     

    Vijay S. Pai, Scott Rixner, and Hyong-youb Kim "Isolating the Performance Impacts of Network Interfaces through Microbenchmarks." Proceedings of the Joint International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS) (2004)

     
     

    Brucek Khailany, William J. Dally, Scott Rixner, Ujval J. Kapasi, John D. Owens, and Brian Towles "Exploring the VLSI Scalability of Stream Processors." Proceedings of the 9th International Symposium on High-Performance Computer Architecture (HPCA) (2/2003)

     
     

    Hyong-youb Kim, Vijay S. Pai, and Scott Rixner "Exploiting Task-Level Concurrency in a Programmable Network Interface." Proceedings of the Symposium on Principles and Practice of Parallel Programming (PPoPP) (6/2003)

     
     

    Ben Serebrin, John Owens, Chen H. Chen, Stephen P. Crago, Ujval J. Kapasi, Brucek Khailany, Peter Mattson, Jinyung Namkoong, Scott Rixner, William Dally "A Stream Processor Development Platform." Proceedings of the International Conference on Computer Design (9/2002)

     
     

    Hyong-youb Kim, Vijay S. Pai, and Scott Rixner "Increasing Web Server Throughput with Network Interface Data Caching." Proceedings of the International Conference on Architectural Support for Programming Languages and operating Systems (10/2002)

     
     

    John D. Owens, Scott Rixner, Ujval J. Kapasi, Peter Mattson, Brian Towles, Ben Serebrin, and William J. Dally "Media Processing Applications on the Imagine Stream processor." Proceedings of the International Conference on Computer Design (9/2002)

     
     

    Ujval J. Kapasi, William J. Dally, Scott Rixner, John D. Owens, and Brucek Khailany "The Imagine Stream Processor." Proceedings of the International Conference on Computer Design (9/2002)

     
     

    Peter Mattson, William J. Dally, Scott Rixner, Ujval J. Kapasi, and John D. Owens "Communication Scheduling." Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (11/2000)

     
     

    Scott Rixner, William J. Dally, Brucek Khailany, Peter Mattson, Ujval J. Kapasi, John D. Owens "Register Organization for Media Processing." Proceedings of the 6th International Symposium on High-Performance Computer Architecture (1/2000)

     
     

    Scott Rixner, William J. Dally, Ujval J. Kapasi, Brucek Khailany, Abelardo Lopez-Lagunas, Peter R. Mattson, John D. Owens "A Bandwidth-Efficient Architecture for Media Processing."  (12/1998)

     
     

    Scott Rixner, William J. Dally, Ujval J. Kapasi, Peter Mattson, and John D. Owens "Memory Access Scheduling." Proceedings of th 27th International Symposium on Computer Architecture (6/2000)

     
     Other
     

    Alan L. Cox, Kartik Mohanram, and Scott Rixner "Dependable is not Unaffordable." Proceedings of the Workshop on Architectural and System Support for Improving Software Dependability (2006)

     
     

    Michael Brogioli, Paul Willmann, and Scott Rixner "Parallelization Strategies for Network Interface Firmware." Proceedings of the Workshop on Optimizations for DSP and Embedded Systems (2006)

     
     

    Michael Calhoun, Alan Cox, and Scott Rixner "Kernel Block Memory Operations." Proceedings of the Workshop on Memory Performance Issues (2006)

     
     

    Kartik Mohanram and Scott Rixner "Context-independent Codes for Off-chip Interconnects." Proceedings of the Workshop on Power-Aware Computer Systems (PACS) (2004)

     
     

    Sridhar Rajagopal, Joseph R. Cavallaro, and Scott Rixner "Improving Power Efficiency in Stream Processors through Dynamic Cluster Reconfiguration." Proceedings of the Workshop on Media and Streaming Processors (2004)

     
     

    Supratik Majumder and Scott Rixner "Comparing Ethernet and Myrinet for MPI Communication." Proceedings of the Workshop on Languages, Compilers, and Run-Time Support for Scalable Systems (LCR) (2004)

     
     

    Sridhar Rajagopal, Scott Rixner, and Joseph R. Cavallaro "A Programmable Baseband Processor Design for Software Defined Radios." Proceedings of the Midwest Symposium on Circuits and Systems (8/2002)

     
     

    Brucek Khailany, William J. Dally, Scott Rixner, Ujval J. Kapasi, Peter Mattson, Jin Namkoong, John D. Owens, and Brian Towles "Imagine: Signal and Image Processing Using Streams." Proceedings of Hotchips 12 (8/2000)

     
    Presentations
     Conference Committee Member
     

    Program Committee Member, IEEE Micro Top Picks in Computer Architecture, 2012

     
     Invited Papers
     

    "Network virtualization: Breaking the performance barrier." ACM Queue, (January/February 2008)

     
     

    "Protection Strategies for Direct Access to Virtualized I/O Devices." SENIX Annual Technical Conference, Boston, MA,. (June 2008) With P. Willmann, S. Rixner, A. L. Cox

     
     Invited Talks
     

    "Explaining the Impact of Network Transport Protocols on SIP Proxy Performance." The International Symposium on Performance Analysis of Systems and Software (ISPASS),, Austin, TX. (April 2008) With K. K. Ram, I. C. Fedeli, A. L. Cox

     
     

    "Scheduling I/O in Virtual Machine Monitors,." The International Conference on Virtual Execution Environments (VEE), Seattle, WA. (March 2008) With D. Ongaro, A. L. Cox, and S. Rixner

     
     

    "Computer Architecture and Operating Systems Research @ Rice." AMD Visit, Houston, TX. (May 24, 2007)

     
     

    "Scheduling Pitfalls for I/O-intensive Guests." Xen Summit, Santa Clara, CA. (November 15, 2007)

     
     

    "Network Servers: Meeting the Bandwidth Demands of the Future." The Rice Alliance Information Technology Venture Forum, Houston, TX. (10/29/2004)

     
     Keynote Speaker
     

    "Network Virtualization: Breaking the Performance Barrier." ACM Queue, (January/February, 2008))

     
     Other
     

    "Networking in the Age of Virtualization." CITI Luncheon, Houston, TX. (February 2, 2007)

     
     

    Advisor.  "An Event-driven Architecture for MPI Libraries." The Los Alamos Computer Science Institute Symposium (LACSI), Sante Fe, NM. (10/13/2004) With Supratik Majumder and Vijay S. Pai

     
     

    Lead Author.  "Memory Controller Optimizations for Web Servers." The 37th Annual International Symposium on Microarchitecture (MICRO), Portland, OR. (12/8/2004)

     
     

    "DSP Architectural Considerations for Optimal Baseband Processing." Texas Instruments Developer Conference, Houston, Texas. (August 7, 2002)

     
     

    "Network Interface Data Caching." Stanford University, Stanford, California. (August 22, 2002)

     
     

    "Future Microprocessors: Technology, Applications, and Architecture." Industrial Affiliates Meeting, Department of Computer Science, Rice University, Houston, Texas. (October 2, 2001)

     
     

    "Stream Architecture, Rethinking Media Processor Design." Compaq Technical Seminar, Houston, Texas. (August 8, 2001)

     
     

    "Stream Architecture: Rethinking Media Processor Design." The University of Texas at Austin. Computer Architecture Seminar Series, Austin, Texas. (April 9, 2001)

     
     

    "Memory Access Scheduling." The 27th International Symposium on Computer Architecture, Vancouver, british Columbia. (June 13, 2000)

     
     

    "Register Organization for Media Processing." The 6th International Symposium on High-Performance Computer Architecture, Toulouse, France. (January 10-12, 2000)

     
     Workshops
     

    Rice 2032 Building the Vision in Disruptive Times: Teaching (January 20, 2012) Science and Engineering CAREER Workshop Panel (2011 and 2012)

     
     

    Advisor.  "Comparing Ethernet and Myrinet for MPI Communication." The 7th Workshop on Languages, Compilers, and Run-time Support for Scalable Systems (LCR), Houston, TX. (10/23/2004) With Supratik Majumder

     
     

    Co-lead Author.  "Context-indendent Codes for Off-chip Interconnects." The 4th Workshop on Power-aware Computer Systems (PACS), Portland, OR. (12/5/2004) With Kartik Mohanram

     
     

    Advisor.  "Improving Power Efficiency in Stream Processors through Dynamic Cluster Reconfiguration." The 6th Workshop on Media and Streaming Processors (MSP), Portland, OR. (12/5/2004) With Sridhar Rajagopal and Joseph Cavallaro

     
    Supervised Theses & Dissertations
     Kanu Chada, Master of Science A Reconfigurable Decoder Architecture for Wireless LAN and Cellular Systems. (2001) (Thesis Committee Member)

     Eric E. Allen, Master of Science Efficient Implementation of Run-time Generic Types for Java. (2002) (Thesis Committee Member)

     Michael Brogioli, Master of Science Dynamically Reconfigurable Data Caches in Low Power Computing. (2002) (Thesis Co-Director)

     Hyong-Youb Kim, Master of Science Improving Networking Server Performance with Programmable Network Interfaces. (2003) (Thesis Director)

     Algis Rudys, Master of Science Termination and Rollback in Language-Based Systems. (2003) (Thesis Committee Member)

     Sumit Mittal, Master of Science A Consistent and Transparent Solution for Caching Dynamic Web Content. (2004) (Thesis Committee Member)

     Tinoosh Mohsenin, Master of Science Design and Evaluation of FPGA-based Gigabit Ethernet/PCI Network Interface Card. (2004) (Thesis Director)

     Sridhar Rajagopal, Doctor of Philosophy Data-parallel Digital Signal Processors: Algorithm Mapping, Architecture Scaling, and Workload Adaptation. (2004) (Thesis Committee Member)

     Supratik Majumder, Master of Science High Performance MPI Libraries for Ethernet. (2004) (Thesis Director)

     Paul Willmann, Master of Science Simulation-Driven Design of High-Performance Network Interface Cards. (2004) (Thesis Committee Member)

     Michael Brogioli, Doctor of Philosophy Reconfigurable Heterogeneous Architectures for Numerically Intensive Embedded Computing Workloads. (2006) (Thesis Committee Member)

     Michael Calhoun, Master of Science Characterization of Block Memory Operations. (2006) (Thesis Director)

     Hyong-youb Kim, Doctor of Philosophy TCP Offload through Connection Handoff. (2006) (Thesis Director)

     Michael Brogioli, Doctoral (ECE) Reconfigurable Heterogeneous Architectures for numerically Intensive Embedded Computing Workloads. (2007) (Thesis Committee Member)

     Paul Willmann, Doctoral (ECE) Efficient Hardware/Software Architectures for Highly Concurrent Network Servers. (2007) (Thesis Committee Member)

     Predrag Radosavljevic, Ph.D. Sphere Detection and LDPC Decoding Algorithms and Architectures for Wireless Systems. (2008) (Thesis Committee Member)

     Annahita Youssefi, Masters Exploring the Potential for Accelerating Sparse Matrix-Vector Product on a Processing-in-Memory Architecture. (2008) (Thesis Committee Member)

     Kaushik Kumar Ram, Master of Science Efficient Virtualization of Network Interfaces Without Sacrificing Safety and Transparency. (2010) (Thesis Committee Member)

     Michael Foss, Master of Science The Axon Ethernet Device. (2010) (Thesis Director)

     Jeffrey Shafer, Doctor of Philosophy A Storage Architecture for Data-Intensive COmputing. (2010) (Thesis Director)

     Thomas Barr, Master of Science Exploiting Address Space Contiguity to Accelerate TLB Miss Handling.. (2010) (Thesis Committee Member)

     Joanna Crompton, Master of Science Optimizing Network I/O Virtualization through Guest-Driven Scheduler Bypass. (2011) (Thesis Committee Member)

     Myeongjae Jeon, Master of Science Reducing DRAM Row Activations with Eager Writeback. (2012) (Thesis Director)

     Brent Stephens, Master of Science Designing Scalable Networks for Future Large Datacenters. (2012) (Thesis Committee Member)

     Kaushik Kumar Ram, Doctoral New Architectures and Mechanisms for the Network Subsystems in Virtualized Servers. (2013) (Thesis Committee Member)

     Thomas Barr, Doctoral Microcontroller Programming for the Modern World. (2014) (Thesis Director)

     Linge Dai, Masters Thread Scheduling on Embedded Runtime Systems. (2014) (Thesis Director)

     Myeongjie Jeon, Doctoral Predictive Parallelization: A Framework for Reducing . (2014) (Thesis Director)

     Conglong Li, Masters GD-Wheel: A Cost-Aware Replacement Policy for Key-Value Stores. (2014) (Thesis Committee Member)

     Rebecca Smith, Masters Reliability and Optimization for Resource-Constrained Embedded Systems. (2015) (Thesis Director)

    Awards, Prizes, & Fellowships
     Rice Student Association Outstanding Mentor Award, Rice University (2014)

     Honored for Rice's first massive open online course - MOOC/Coursera , Rice Board of Trustees (2013)

     Program Committee Member, Joint International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS) (2002)

     Program Committee Member, Hot Interconnects (2002)

     Referee, IEEE International Conference on Computer Design (ICCD) (2001)

     Referee, IEEE International Symposium on High-Performance Computer Architecture (HPCA) (2001)

     Referee, ACM/IEEE International Conference on Parallel Architectures and Compilation Techniques (PACT) (2001)

     Referee , ACM/IEEE International Symposium on Computer Architecture (ISCA) (2001)

     Referee, IEEE Transactions on Computers (2001)

     Member, Association for Computing Machinery (2001)

     Program Committee Member, Joint International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS) (2002)

     Program Committee Member, Workshop on Streaming and Media Processors (2001)

     Member, Tau Beta Pi (2001)

     Referee, ACM/IEEE International Symposium on Microarchitecture (MICRO) (2001)

     Award for one of Best Three Student Papers at HPCA-6, (January 2000)

    Positions Held
     Program Committee Member, International Symposium on Performance Analysis of Systems and Software (ISPASS). (2008 - 2008)

     External Review Committee Member, MICRO. (2014 - 2014)

     Program Committee Member, ACM SIGCOMM. (2011 - 2011)

     Program Committe Member, International Symposium on Performance Analysis of Systems and Software (ISPASS). (2009 - 2009)

     Co-organier, The First and Second Workshops on I/O Virtualization. (2010 - 2010)

     Program Committe Member, International Symposium on Performance Analysis of Systems and Software (ISPASS). (2010 - 2010)

     Program Committe Member, International Conference on Computer Degign (ICCD). (2009 - 2009)

     Program Committee Member, The Israeli Experimental Systems Conference (SYSTOR). (2009 - 2009)

     Panel Member, Workshop on Memory Systems Performance and Correctness. (2008 - 2008)

     External Program Committee Member, PACT. (2014 - 2014)

     Program Committe Member, ACM SIGCOMM. (2010 - 2010)

     Program Committe Member, Symposium on Architectures for Networking and Communications Systems (ANCS). (2010 - 2010)

     Co-organier, The First and Second Workshops on I/O Virtualization. (2008 - 2008)

     Referee, ACM International Conference on Architectural Support for Programming languages and Operating Systems (ASPLOS). (2002 - 2002)

     Referee, ACM/IEEE International symposium on Microarchitecture (ISCA). (2002 - 2002)

     Referee, ACM/IEEE International Symposium on Microarchitecture (MICRO). (2002 - 2002)

     Referee, ACM/IEEE International Conference on Parallel Architectures and Compilation Techniques (PACT). (2002 - 2002)

     Referee, ILEEE International Symposium on High-Performance Computer Architecture (HPCA)rmance Co. (2002 - 2002)

     Referee, IEEE International Conference on Computer Design (ICCD). (2002 - 2002)

     Referee, IEEE Transactions on Computers. (2002 - 2002)